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UPSC 2026 Maths Optional Paper 2 Q5c — Step-by-Step Solution

10 marks · Section B

Logic gates and truth tables · Numerical Analysis · asked 3× in 14 yrs · Read the full method →

Question

Consider the logic circuit LL: inputs AA, BB, CC feed three AND gates whose outputs feed a single OR gate producing YY. The first AND gate receives AA, BB and CC directly; the second receives AA, Bˉ\bar{B} (via an inverter on the BB line) and CC; the third receives Aˉ\bar{A} (via an inverter on the AA line) and BB.

(i) Express YY as a Boolean expression.

(ii) Write 8-bit special sequences for AA, BB and CC.

(iii) Find the truth table of LL using 8-bit special sequences.

(In the printed paper this is the only figure: a gate diagram. The wiring above is the transcription of that diagram — three AND gates feeding one OR gate, with AND-3 taking exactly two inputs, Aˉ\bar A and BB.)

The circuit L as printed in the paper. Three inputs enter from the left as horizontal rails — A at the top, B in the middle, C at the bottom — and each rail turns down into its own vertical bus; a junction dot marks every tap, so the fan-out is countable (A taps three times, B three times, C twice), and the six places where a wire crosses another without connecting are drawn as hop-overs. Three AND gates are stacked vertically and their outputs feed a single OR gate whose output line is labelled Y. AND-1 (top) has three inputs: A, B and C, all taken directly. AND-2 (middle) has three inputs: A directly, B through an inverter whose output is labelled \bar B, and C directly. AND-3 (bottom) has exactly two inputs and no C input: A through a second inverter whose output is labelled \bar A, and B directly — its gate body is drawn shorter than the other two so the two-lead count is unmistakable. The two inverters are drawn as separate triangle-and-bubble elements. Reading one product term per AND gate and summing them at the OR gate gives Y=ABC+A\bar BC+\bar AB.

The circuit LL as printed in the paper (UPSC CSM 2026 Paper II, Q5(c)). The prose above is the accessible-text transcription of this diagram; the two must agree exactly — in particular AND-3 has two inputs, not three.

Technique

Read the sum-of-products straight off the circuit — one product term per AND gate, OR-ed together — then simplify before tabulating: the first two terms differ only in BB and Bˉ\bar B, so the complementation law collapses them at once. For part (iii) the “special sequences” technique replaces row-by-row evaluation with eight parallel evaluations done as bitwise operations on 8-bit words; the whole truth table then falls out as a single output word, and the answer must show the bitwise columns, because that is the technique being examined.

Solution

Step 0 — Read the circuit.

gateinputsoutput
AND-1A, B, CA,\ B,\ CABCABC
AND-2A, Bˉ, CA,\ \bar B,\ CABˉCA\bar BC
AND-3Aˉ, B\bar A,\ B (two inputs only)AˉB\bar A B
ORthe three AND outputsYY

(i) The Boolean expression.

An AND gate outputs the product of its inputs and an OR gate the sum of its inputs, so

Y=ABC+ABˉC+AˉB.(1)Y=ABC+A\bar BC+\bar AB. \tag{1}

Simplify. The first two terms share the factor ACAC:

ABC+ABˉC=AC (B+Bˉ)=AC⋅1=ACABC+A\bar BC=AC\,(B+\bar B)=AC\cdot 1=AC

using the complement law B+Bˉ=1B+\bar B=1 and the identity X⋅1=XX\cdot1=X. Hence

 Y=AC+AˉB (2)\boxed{\,Y=AC+\bar AB\,} \tag{2}

This is minimal. The minterms of YY are Σm(2,3,5,7)\Sigma m(2,3,5,7) (established in (iii) below); on a three-variable K-map the prime implicants are AˉB\bar AB (cells 2,32,3), ACAC (cells 5,75,7) and BCBC (cells 3,73,7). Cell 22 is covered only by AˉB\bar AB and cell 55 only by ACAC, so both are essential, and together they already cover all four cells. Therefore AˉB+AC\bar AB+AC is the unique minimal sum of products, and the consensus term BCBC is redundant:

AC+AˉB=AC+AˉB+BC(consensus theorem).AC+\bar AB=AC+\bar AB+BC \quad\text{(consensus theorem)} .

(Redundant logically, but the term one would add back to make the hardware free of a static-1 hazard when AA switches with B=C=1B=C=1 — one line, and it shows the circuit is understood, not just the algebra.)

Interpretation. Y=AC+AˉBY=AC+\bar AB is precisely a 2-to-1 multiplexer with AA as the select line: Y=CY=C when A=1A=1 and Y=BY=B when A=0A=0. Gate count drops from 33 AND + 1+\,1 OR + 2+\,2 NOT (with a 3-input OR-free 3-input AND) to 22 AND + 1+\,1 OR + 1+\,1 NOT.

(ii) The 8-bit special sequences.

Convention (must be stated, since the sequences depend on it). For n=3n=3 variables there are 23=82^{3}=8 input combinations. List them as the rows of the truth table in ascending binary order with AA as the most significant bit:

(A,B,C)=000, 001, 010, 011, 100, 101, 110, 111.(A,B,C)=000,\,001,\,010,\,011,\,100,\,101,\,110,\,111 .

Reading each variable down its column gives its 8-bit special (standard/distinctive) sequence. For the kk-th of nn variables the sequence is alternating blocks of 2 n−k2^{\,n-k} zeros and 2 n−k2^{\,n-k} ones; with n=3n=3:

A=0 0 0 0⏟4 1 1 1 1⏟4,B=0 0⏟2 1 1⏟2 0 0⏟2 1 1⏟2,C=0 1 0 1 0 1 0 1.A=\underbrace{0\,0\,0\,0}_{4}\ \underbrace{1\,1\,1\,1}_{4},\qquad B=\underbrace{0\,0}_{2}\ \underbrace{1\,1}_{2}\ \underbrace{0\,0}_{2}\ \underbrace{1\,1}_{2},\qquad C=0\,1\,0\,1\,0\,1\,0\,1 .  A=00001111,B=00110011,C=01010101 \boxed{\ A=00001111,\qquad B=00110011,\qquad C=01010101\ }

Bit position jj (j=0,…,7j=0,\dots,7, read left to right) of every sequence refers to the same input combination, namely the binary representation of jj — that is the whole point of the device.

(iii) The truth table by bitwise operations on the sequences.

Complements are bitwise NOT:

Aˉ=11110000,Bˉ=11001100.\bar A=11110000,\qquad \bar B=11001100 .

Now form the three AND-gate outputs by bitwise AND and the OR-gate output by bitwise OR. Working the unsimplified expression (1) — which is what the circuit actually builds — and, in parallel, the simplified expression (2), as a self-check:

wordbit 01234567
AA00001111
BB00110011
CC01010101
Aˉ\bar A11110000
Bˉ\bar B11001100
ABAB00000011
ABCABC00000001
ABˉA\bar B00001100
ABˉCA\bar BC00000100
AˉB\bar AB00110000
ACAC00000101
Y\mathbf{Y}00110101

In compact sequence form:

ABC=00000001,ABˉC=00000100,AˉB=00110000,ABC=00000001,\qquad A\bar BC=00000100,\qquad \bar AB=00110000, Y=ABC+ABˉC+AˉB=00000001+00000100+00110000=00110101,Y=ABC+A\bar BC+\bar AB=00000001+00000100+00110000=00110101,

and by the simplified route

Y=AC+AˉB=00000101+00110000=00110101. ✓Y=AC+\bar AB=00000101+00110000=00110101 .\ \checkmark

The two routes give the identical word, which confirms the simplification (2) — a free check the technique hands you.

Reading the truth table off the output sequence. Bit jj of YY is the output for the row whose (A,B,C)(A,B,C) is the binary form of jj:

jjAABBCCYY
00000
10010
20101
30111
41000
51011
61100
71111

So Y=Σm(2,3,5,7)Y=\Sigma m(2,3,5,7), as used in the K-map argument of part (i). Sanity spot-checks against Y=AC+AˉBY=AC+\bar AB: row 22 (0,1,0)(0,1,0) gives AˉB=1⇒Y=1\bar AB=1\Rightarrow Y=1 ✓; row 66 (1,1,0)(1,1,0) gives AC=0, AˉB=0⇒Y=0AC=0,\ \bar AB=0\Rightarrow Y=0 ✓; row 55 (1,0,1)(1,0,1) gives AC=1⇒Y=1AC=1\Rightarrow Y=1 ✓. And the multiplexer reading is visible in the table: for A=0A=0 (rows 00–33) YY copies BB; for A=1A=1 (rows 44–77) YY copies CC. ■\qquad\blacksquare

Answer

  Y=ABC+ABˉC+AˉB=AC+AˉB  \boxed{\;Y=ABC+A\bar BC+\bar AB=AC+\bar AB\;}   A=00001111,B=00110011,C=01010101,Y=00110101=Σm(2,3,5,7)  \boxed{\;A=00001111,\quad B=00110011,\quad C=01010101,\quad Y=00110101=\Sigma m(2,3,5,7)\;}

with truth table Y=0,0,1,1,0,1,0,1Y=0,0,1,1,0,1,0,1 for (A,B,C)=000,001,010,011,100,101,110,111(A,B,C)=000,001,010,011,100,101,110,111 respectively.

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