Representation of Integers, Signed Integers, and Reals (incl. Double Precision)
At a Glance
- Frequency: 2 sub-parts across 2 of 14 years (2024, 2026)
- Priority tier: T4
- Marks (count): 5 (1)
- Average solve time: ~10 min
- Difficulty mix: medium 1
- Section: A | Dominant type: computation
Why This Chapter Matters
A single 5-mark question from 2024 covers the full spectrum of number representation — unsigned integers, signed integers (2’s complement), and IEEE 754 double-precision floating-point. The marks are quick if the double-precision bit layout is memorised and the bias-1023 formula is applied correctly. This atom is a reliable minimal-effort maximum-marks target.
Minimum Theory
Unsigned Integers
An -bit unsigned integer stores values from to . The value is:
where is the -th bit (LSB = ).
Signed Integers: Three Schemes
| Scheme | Positive | Negative | Range ( bits) |
|---|---|---|---|
| Sign-magnitude | to ; two zeros | ||
| 1’s complement | (bitwise NOT) | to ; two zeros | |
| 2’s complement | to ; one zero |
2’s complement is universal in modern hardware. Its key advantage: ordinary binary addition works for both positive and negative numbers without special cases.
Detecting overflow in 2’s complement addition. Overflow occurs if and only if two numbers of the same sign are added and the result has the opposite sign.
Fixed-Point Reals (Q-format) — not the same thing as floating point
If a word is specified by giving the number of fractional bits, the binary point is nailed to one place and the format is fixed point, not floating point. There is no exponent field, no bias, and no implicit leading . An -bit word with fractional bits (a format) has value
Fast equivalent: read all bits as one plain binary integer and divide by — inserting a binary point places from the right is a division by . Use it as a free arithmetic check on the positional sum.
Exactness rule. Every -format word is an exact multiple of , so its decimal value terminates in at most places. An answer with a recurring decimal tail is wrong by construction — a useful sanity check worth stating.
Sign. A bit-count and a point position do not by themselves determine a sign convention. Unless the question names a sign bit, read the word unsigned, and say that you are doing so. (The signed readings of an -bit word are negated for sign-magnitude, and for two’s complement, both then scaled by .)
Floating-Point: IEEE 754 Double Precision
Bit layout (64 bits total):
- = sign bit (0 = positive, 1 = negative).
- = biased exponent (11 bits); the stored value is , so the actual exponent is .
- = mantissa (52 bits); the leading 1 is implicit, giving an effective 53-bit significand.
Value of a normalised number ():
where means .
Special values:
| (stored) | Meaning | |
|---|---|---|
| 0 | 0 | |
| 0 | Subnormal: | |
| 2047 | 0 | |
| 2047 | NaN |
Machine epsilon. The smallest such that in double precision:
Converting a decimal to double precision — procedure:
- Determine the sign bit .
- Convert to binary.
- Normalise: write as (shift the binary point so that exactly one 1 is to the left).
- Biased exponent: ; convert to 11-bit binary.
- Mantissa: take the 52 bits after the binary point of , padding with zeros on the right if needed.
Question Archetypes
| Archetype | Recognition |
|---|---|
| decimal-to-double | Represent a given decimal number in IEEE 754 double-precision format |
| interpret-bit-pattern | Given a 64-bit pattern, decode the double-precision value |
| signed-range-or-2s-comp | State the range, or convert a negative number to 2’s complement |
| fixed-point-decode | A word is given “with bits as fractional part”; find its decimal value |
decimal-to-double (1 question; 2024)
Recognition Cues
- “Represent in IEEE 754 double-precision format.”
- “Give the sign, exponent, and mantissa bits.”
Solution Template
- Write (positive) or (negative).
- Convert to binary using repeated multiplication (fractional part) or division (integer part).
- Normalise to .
- Compute biased exponent ; express as 11-bit binary.
- Write the 52 mantissa bits (the fractional part , padded to 52 bits).
- Assemble: .
Worked Example
2024 Paper 2, 2024-P2-Q8a (5 marks)
Represent the decimal number in IEEE 754 double-precision (64-bit) floating-point format. Give the sign bit, biased exponent (in binary), and the first 10 bits of the mantissa.
Step 1 — sign bit.
, so .
Step 2 — convert to binary.
Integer part: .
Fractional part: bit 1; bit 0; bit 1. Stop.
So .
Therefore: .
Step 3 — normalise.
Exponent .
Step 4 — biased exponent.
Convert to 11-bit binary:
Step 5 — mantissa (52 bits).
The fractional part of is . The first 10 mantissa bits are .
Step 6 — assemble.
Common Traps
- Bias is 1023 for double precision, not 127 (which is for single precision / 32-bit).
- The implicit leading 1 is not stored in the mantissa bits. The 52 bits hold only the fractional part after the binary point.
- When the exponent is negative (e.g., ), the biased exponent is still positive: .
- Subnormal numbers (biased exponent = 0) do not have an implicit leading 1; their value is .
- Confusing machine epsilon with the smallest positive double (the latter is the smallest normalised number).
fixed-point-decode (1 question(s); 2026)
Read the format specification, not the label. A question may call the word “floating point” and describe a fixed-point one. The give-away is that it tells you how many bits are fractional: that pins the binary point, which is precisely what floating point does not do. Solve it as fixed point — that is the only reading under which the given data determines an answer at all.
Recognition Cues
- “-bit number with bits as fractional part.”
- No exponent field, no bias, and no mention of IEEE 754 is made.
- Several words are given at once, and at least one begins with (a setter’s signal that sign handling is not the point).
Solution Template
- Fix the format in one opening sentence — integer bits, then the point, then fractional bits, read unsigned. This sentence is what lets the examiner distinguish a correct answer from a lucky one.
- Split the string after bits.
- Evaluate the integer part by the weights .
- Evaluate the fractional part by the weights ; collecting over the common denominator is quicker and less error-prone than adding decimals.
- Check with .
- If the leading bit is 1, tabulate the signed alternatives as a labelled remark — a stated decision, not a hedged answer.
Worked Example
2026 Paper 2, 2026-P2-Q6b-i (8 marks)
Find the decimal equivalent of the following floating point 10-bit numbers with 5 bits as fractional part: and .
Source: analysis/solutions/2026-P2-Q6b-i.md
Format. bits with fractional bits is : five integer bits, the point, five fractional bits, read unsigned.
First word. .
Second word. .
Both terminate in five decimals, as every word must.
The signed readings, as a labelled remark. The second word begins with and is under every convention. Only the first is convention-sensitive:
| Reading of | Value |
|---|---|
| Unsigned (the reading used) | |
| Sign–magnitude | |
| Two’s complement |
The unsigned reading is the one to present: the question supplies exactly one piece of format information — where the point sits — and supplies it for both numbers alike. Had a sign bit been intended, the integer field would be four bits, not five, and “5 bits as fractional part” would no longer determine the layout.
Common Traps
- Solving it as IEEE 754. There is no exponent field. Applying bias-1023 machinery to a 10-bit word is answering a different question.
- Reading the leading bit as a sign bit unprompted. It turns into a negative number. Read unsigned and say so; put the alternatives in a remark.
- Applying the fractional weights in reverse. The bit immediately right of the point is , the last is .
- Miscounting the split. Ten bits, five and five. Splitting after four or six shifts every weight.
- Dropping a trailing zero in the fractional field — it changes the place values of everything before it.
- Not showing the positional expansion. On an 8-mark part it is the only evidence of method; a bare decimal earns little.
Marks-Aware Writing
At 5 marks, an efficient answer has five numbered steps: sign bit, binary conversion of , normalisation showing , biased exponent computation and conversion to 11-bit binary, and the mantissa bits. Every step must be shown — the examiner cannot award marks for a final bit pattern without the derivation. Stating the IEEE 754 field widths (1-11-52) in the opening line saves you from being penalised for the wrong layout.
Practice Set
Only one historical question on this atom (shown above).